loic/chip-8
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Minor changes

Browse source
This commit is contained in:
Loïc Guégan 2023-12-25 07:30:17 +01:00
parent 475996af26
commit 001e18b3d4
1 changed files with 24 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

32
src/vcpu.c
View file

@ -13,7 +13,7 @@ unsigned short S;
// General purpose registers (8 bits each) // General purpose registers (8 bits each)
// Note last one often used as a flag register // Note last one often used as a flag register
unsigned char R[16]; unsigned char V[16];
// Delay timer (8 bits) // Delay timer (8 bits)
unsigned char DT; unsigned char DT;
@ -34,19 +34,35 @@ void VCPUFetch(){
} }
void VCPUDecode(){ void VCPUDecode(){
char X=(State.opcode<<4) & 0xF0; State.X=(State.opcode<<4) & 0xF0;
char Y=(State.opcode<<8) & 0xF0; State.Y=(State.opcode<<8) & 0xF0;
char N=(State.opcode<<12) & 0xF0; State.N=(State.opcode<<12) & 0xF0;
char NN=(State.opcode<<8) & 0xFF; State.NN=(State.opcode<<8) & 0xFF;
short NNN=(State.opcode<<4) & 0xFFF0; State.NNN=(State.opcode<<4) & 0xFFF0;
} }
void VCPUExecute(){ void VCPUExecute(){
switch(State.opcode){ switch(State.opcode & 0xF){
case 0x00E0: case 0x0:
ScreenClear(); ScreenClear();
break break
;; ;;
case 0x1:
PC=State.NNN;
break
;;
case 0x6:
V[State.X]=State.NN;
break
;;
case 0x7:
V[State.X]+=State.NN;
break
;;
case 0xA:
I=State.NNN;
break
;;
} }
} }