diff --git a/src/core/idt.c b/src/core/idt.c
index 5acdf8b..861927a 100644
--- a/src/core/idt.c
+++ b/src/core/idt.c
@@ -2,7 +2,7 @@
 
 struct IDT_REGISTER IDTR={
     8*IDT_MAX_ENTRY,
-    0x0
+    0x0 // IDT is located at physical address 0
 };
 
 // Interrupt functions (cf int.S)
@@ -15,17 +15,18 @@ INT_SYSCALL;
 
 
 void idt_init(){
-    // Map first default 32 entries 
+    // Map entries, note that first 32 entries are used by the CPU
+    // and should be mapped to a function (INT_DEFAULT here)
     for(int i=0;i<IDT_MAX_ENTRY;i++){
-        idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_DEFAULT,IDT_INT_GATE},i);
+        idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_DEFAULT,IDT_INT_GATE|IDT_P},i);
         if(i==14)
-            idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_PAGE_FAULT,IDT_INT_GATE},i);
+            idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_PAGE_FAULT,IDT_INT_GATE|IDT_P},i);
         if(i==32)
-            idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_CLOCK,IDT_INT_GATE},i);
+            idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_CLOCK,IDT_INT_GATE|IDT_P},i);
         if(i==33)
-            idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_KEYPRESS,IDT_INT_GATE},i);
+            idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_KEYPRESS,IDT_INT_GATE|IDT_P},i);
         if(i==48)
-            idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_SYSCALL,IDT_INT_GATE|0x6000},i);
+            idt_write_entry((IDT_ENTRY){0x08,(u32)&INT_SYSCALL,IDT_INT_GATE|IDT_P|IDT_PRVL_3},i);
     }
     // Load IDT
     asm("lidtl (IDTR)");
diff --git a/src/core/idt.h b/src/core/idt.h
index 17c5cfa..aceb064 100644
--- a/src/core/idt.h
+++ b/src/core/idt.h
@@ -5,8 +5,13 @@
 #include "core/mem.h"
 
 #define IDT_MAX_ENTRY 200
-#define IDT_INT_GATE 0x8E00
-#define IDT_TRAP_GATE 0xEF00
+#define IDT_INT_GATE 0x0E00
+#define IDT_TRAP_GATE 0x0F00
+#define IDT_P 0x8000
+#define IDT_PRVL_0 0x0000
+#define IDT_PRVL_1 0x2000
+#define IDT_PRVL_2 0x4000
+#define IDT_PRVL_3 0x6000
 
 typedef struct IDT_ENTRY {
     u16 segment;