loic/MicSim
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Add readme

Browse source
This commit is contained in:
Loic GUEGAN 2018-08-31 18:53:05 +02:00
parent 27268a1253
commit 16fd07d6a8
1 changed files with 16 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
README.md Normal file
View file

@ -0,0 +1,16 @@
# MicSim
Hi! Welcome to MicSim project repo. MicSim is a Mic-1 architecture simulator written in python. It is specially design for studying purpose.
### How it works ?
It is simple, you have to:
1. Clone the repo
2. Execute micsim.py
3. Enjoy !
### I want to know more about it....
All the architecture components are located in _components_ folder:
- **ijvm.py** Contains standard IJVM constant
- **microprogram.py** Contains IJVM implementation that use Mic-1 architecture
- **caretaker.py** Hold all the Mic-1 architecture components (registers, ram etc..)
- **ram.py** Contains a simple RAM implementation